Rapid mapping of digital integrated circuit logic gates via multi-spectral backside imaging

Modern semiconductor integrated circuits are increasingly fabricated at untrusted third party foundries. There now exist myriad security threats of malicious tampering at the hardware level and hence a clear and pressing need for new tools that enable rapid, robust and low-cost validation of circuit layouts. Optical backside imaging offers an attractive platform, but its limited resolution and throughput cannot cope with the nanoscale sizes of modern circuitry and the need to image over a large area. We propose and demonstrate a multi-spectral imaging approach to overcome these obstacles by identifying key circuit elements on the basis of their spectral response. This obviates the need to directly image the nanoscale components that define them, thereby relaxing resolution and spatial sampling requirements by 1 and 2 - 4 orders of magnitude respectively. Our results directly address critical security needs in the integrated circuit supply chain and highlight the potential of spectroscopic techniques to address fundamental resolution obstacles caused by the need to image ever shrinking feature sizes in semiconductor integrated circuits

Plakalar Arasinda Kayma Baslangicinin Ve Ilerlemesinin Deneysel Arastirilmasi.

Bu projenin temel amaci, kayma baslangicinin ve ilerlemesinin dinamik olarak gözlenmesi için bir deney düzeneginin tasarlanmasi ve bu deney düzenegi sayesinde dinamik olayin gözlemlenmesidir. Tasarlanan deney düzeneginin, iki elastik plakayi, dik kuvvet altinda birbirlerine göre sabit hiz ile kaydirmasi amaçlanmaktadir (bkz. Sekil 1). Ayni zamanda tasarlanacak deney düzenegi ile, plakalar üzerinde uygulanacak olan dik ve yatay kuvvetlerin ölçülmesi ve bunun yaninda plakalarin iki yan yüzeyinden yüksek çözünürlükte pozisyon bilgisinin de ölçülmesi hedeflenmektedir. Dogru alinacak ölçümler genel deplasman ve kuvvet bilgisini verecektir. Böylelikle, alinacak deneysel bilgilerle, iki plaka arasinda meydana gelecek olan sürtünme olayinda, genel kayma baslangicindan önce meydana gelecek olan lokal kayma baslangicinin ve ilerlemesinin, arastirilmasi hedeflenmektedir

Detecting Hardware Trojans Using Backside Optical Imaging of Embedded Watermarks

ABSTRACT Hardware Trojans are a critical security threat to integrated circuits. We propose an optical method to detect and localize Trojans inserted during the chip fabrication stage. We engineer the fill cells in a standard cell library to be highly reflective at near-IR wavelengths so that they can be readily observed in an optical image taken through the backside of the chip. The pattern produced by their locations produces an easily measured watermark of the circuit layout. Replacement, modification or re-arrangement of these cells to add a Trojan can therefore be detected through rapid postfabrication backside imaging. We evaluate our approach using various hardware blocks where the Trojan circuit area is less than 0.1% of the total area and it consumes less than 2% leakage power of the entire chip. In addition, we evaluate the tolerance of our methodology to background measurement noise and process variation